Digital implementation of diode-clamped three-phase three-level SVPWM inverter

Author

Lin, Lei ; Zou, Yunping ; Zhang, Jie ; Zou, Xudong

Author_Institution

Coll. of Electr. & Electron. Eng., Huazhong Univ. of Sci. & Technol., Wuhan, China

Volume

2

fYear

2003

fDate

17-20 Nov. 2003

Firstpage

1413

Abstract

The conventional modulation strategies for diode-clamped three-phase three-level inverter have some disadvantages, such as switching loss of switching device. This paper presents a novel space vector pulse width modulation (SVPWM) scheme to reduce switching loss. Using this novel modulation strategy, the changing of switch states cause only one single phase voltage change every time. In this way, the inverter generates similar output voltage as that under the common strategies, whereas the switching loss is reduced. The proposed scheme has been digitally implemented by using TMS320F240 and its feasibility has been verified by the experimental results.

Keywords

PWM invertors; digital control; power semiconductor diodes; switching convertors; TMS320F240; digital control; diode-clamped three-phase multilevel inverter; phase voltage change; space vector pulse width modulation scheme; switching loss reduction; Capacitors; Diodes; Phase modulation; Pulse width modulation inverters; Space vector pulse width modulation; Stress; Switches; Switching loss; Topology; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Power Electronics and Drive Systems, 2003. PEDS 2003. The Fifth International Conference on

Print_ISBN

0-7803-7885-7

Type

conf

DOI

10.1109/PEDS.2003.1283189

Filename

1283189