Title :
Integration of complementary EDMOS in a standard 0.35 μm CMOS technology for 40 V applications
Author :
Ma, Vivian W Y ; Xu, Edward H P ; Ng, Wai Tung ; Hara, Yoshiyuki ; Furukawa, Yuichi ; Sakai, Kimio ; Imai, Hisaya ; Naito, Takashi ; Nobuyuki, Sato ; Tamura, Satoru ; Takasuka, Kaoru ; Kohno, T.
Author_Institution :
Dept. of Electr. & Comput. Eng., Toronto Univ., Ont., Canada
Abstract :
This paper presents the design of optimized RESURF Extend Drain MOSFET (EDMOS) for 40 V applications. The EDMOS devices are compatible with a standard 0.35 μm CMOS process. Breakdown voltages of 41 V for n-channel with a specific on-resistance of 0.43 mΩcm2 and a 47 V p-channel with a specific on-resistance of 1.41 mΩcm2 are realized without compromising the performance of standard components in the CMOS technology.
Keywords :
CMOS integrated circuits; electric breakdown; power MOSFET; power integrated circuits; 0.35 micron; 40 V; 47 V; CMOS process; MOSFET; breakdown voltages; n-channel resistance; p-channel resistance; BiCMOS integrated circuits; CMOS process; CMOS technology; Costs; Design optimization; Electromagnetic interference; Low voltage; MOSFET circuits; Power integrated circuits; Process design;
Conference_Titel :
Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
Print_ISBN :
0-7803-7749-4
DOI :
10.1109/EDSSC.2003.1283536
