• DocumentCode
    407565
  • Title

    CMOS folding and interpolating A/D Converter with differential compensative T/H circuit

  • Author

    Liu, Fei ; Jia, Song ; Lu, Zhenting ; Ji, Lijiu

  • Author_Institution
    Inst. of Microelectron., Peking Univ., Beijing, China
  • fYear
    2003
  • fDate
    16-18 Dec. 2003
  • Firstpage
    453
  • Lastpage
    456
  • Abstract
    A 450 MS/s, 6-bit CMOS folding and current-mode interpolating A/D Converter is designed in a 0.5 μm standard digital CMOS process. A differential T/H circuit with the offset compensative amplifiers is proposed which can improve sample precision. The converter´s power dissipation is simulated as 190 mW from a 5 V supply. The latency between input and output is 2.5 clock cycles.
  • Keywords
    CMOS digital integrated circuits; amplifiers; analogue-digital conversion; high-speed integrated circuits; integrated circuit design; low-power electronics; 0.5 micron; 190 mW; CMOS folding; differential T/H circuit; interpolating A/D Converter; offset compensative amplifiers; power dissipation; standard digital CMOS process; CMOS process; Capacitance; Circuits; Clocks; Delay; Differential amplifiers; Frequency; Power dissipation; Resistors; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electron Devices and Solid-State Circuits, 2003 IEEE Conference on
  • Print_ISBN
    0-7803-7749-4
  • Type

    conf

  • DOI
    10.1109/EDSSC.2003.1283571
  • Filename
    1283571