DocumentCode :
408383
Title :
Design process supporting simulations on wafer level packages
Author :
Sommer, Johann-Peter ; Wittler, Olaf ; Manessis, Dionysios ; Michel, Bernd
Author_Institution :
Dept. of Mech. Reliability & Micro Mater., Fraunhofer-Inst. for Reliability & Micro Integration, Berlin, Germany
fYear :
2003
fDate :
5-7 May 2003
Firstpage :
45
Lastpage :
49
Abstract :
The design process of innovative and advanced microelectronic systems requires the mechanical behaviour to be taken into account in order to achieve a high level of reliability from the very beginning of the electronic design. In this respect, all essential thermal and mechanical influences during manufacturing as well as operation need to be considered. The influence of design and process parameters on thermomechanical stresses is analysed numerically and pre-optimised for two different types of packages for wireless communication applications in the high frequency range. As a result, design and process improvements can be recommended for assembly levels 1 (wafer level) and 2 (interactions with the carrier and other components).
Keywords :
finite element analysis; power transistors; semiconductor device models; semiconductor device packaging; semiconductor device reliability; system-on-chip; assembly levels; electronic design; microelectronic systems; reliability; simulations; thermomechanical stresses; wafer level packages; wireless communication; Assembly; Electronic packaging thermal management; Frequency; Manufacturing; Microelectronics; Process design; Thermal stresses; Thermomechanical processes; Wafer scale integration; Wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Test, Integration and Packaging of MEMS/MOEMS 2003. Symposium on
Print_ISBN :
0-7803-7066-X
Type :
conf
DOI :
10.1109/DTIP.2003.1287006
Filename :
1287006
Link To Document :
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