DocumentCode :
408422
Title :
An integrated approach for analog circuit testing using autocorrelation analysis, singular value decomposition and probabilistic neural network
Author :
El-yazeed, M. F Abu
Author_Institution :
Dept. of Electron. & Commun., Cairo Univ., Giza, Egypt
fYear :
2003
fDate :
9-11 Dec. 2003
Firstpage :
41
Lastpage :
45
Abstract :
This paper presents an automated approach for the detection and isolation of soft and hard faults in analog electronic circuits. It studies the ability to combine autocorrelation analysis as a preprocessor, singular value decomposition (SVD) for dimensionality reduction, and probabilistic neural network (PNN) as a classifier. The potential of the algorithm demonstrated by two active circuit examples. The first example simulates soft faults while the second example simulates hard faults. Classification results are found comparable to those obtained when the traditional wavelet and Fourier transforms (FT) are utilized as preprocessors.
Keywords :
Fourier transforms; analogue integrated circuits; fault diagnosis; integrated circuit design; integrated circuit testing; neural nets; singular value decomposition; wavelet transforms; Fourier transforms; SVD; analog circuit testing; analog electronic circuits; autocorrelation analysis; fault diagnosis; probabilistic neural network; singular value decomposition; traditional wavelet; Analog circuits; Autocorrelation; Circuit faults; Circuit simulation; Circuit testing; Electrical fault detection; Electronic circuits; Fault detection; Neural networks; Singular value decomposition;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
Type :
conf
DOI :
10.1109/ICM.2003.1287718
Filename :
1287718
Link To Document :
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