Title :
A 4Gb/s 1:16 DEMUX using an all-static 0.18-μm CMOS logic
Author :
Abdalla, Y.S. ; Elmasry, M.I.
Abstract :
This paper introduces a design for a 4Gb/s half rate 1:16 DEMUX based on 0.18 μm CMOS technology using only static CMOS logic. A new sizing methodology is used to minimize the power consumption. The power consumption is reduced several times compared to recently published results with the delay power product also reduced by 33%.
Keywords :
CMOS logic circuits; integrated circuit design; power consumption; 0.18 micron; CMOS logic; integrated circuit design; power consumption; CMOS logic circuits; CMOS technology; Clocks; Design methodology; Energy consumption; Frequency; High speed optical techniques; Latches; Logic design; Transceivers;
Conference_Titel :
Microelectronics, 2003. ICM 2003. Proceedings of the 15th International Conference on
Print_ISBN :
977-05-2010-1
DOI :
10.1109/ICM.2003.1287736
