Multifunction generator using Horner scheme and small tables

This paper deals with the computation of some elementary functions using piecewise Minimax approximation and small tables. The strength of the method is that the same scheme is used to compute all the elementary functions with similar delay and accuracy of lulp (unit in last place). The hardware implementation of this method requires one multiplier and one adder chosen among those available in the Virtex-II FPGA as they present the highest performances concerning the delay and the area. The method has been implemented in a recursive structure which operates at a frequency of over than 25 Mhz.