A novel collector-tub concept for realizing high-voltage lateral bipolar transistors on SOI

Two-dimensional numerical simulation studies of collector-emitter breakdown voltage (BV_CEO) of a novel collector-tub lateral bipolar transistor (CTLBT) on silicon-on-insulator (SOI) are presented. The collector-tub is realized by etching the buried oxide (BOX) at the collector high-low (NN⁺) junction side followed by an N-implantation in a conventional lateral bipolar transistor (LBT) on SOI. Such a modification makes the collector potential to be absorbed both by the collector drift and substrate regions and the electric field spreads along the collector drift length. The simulation results show that by choosing appropriate buried oxide (BOX) thickness (t_OX), collector-tub junction depth (X_j), drift region doping (N_D) and substrate doping (N_S), the electric field profile in the collector drift region of the CTLBT can be redistributed so that its BV_CEO value is more than double when compared with a conventional lateral bipolar transistor on SOI. The reasons for this significant improvement in breakdown performance are explained.