Micro-architecture issues of predicated execution

Predicated execution appears to be a promising way to exploit more instruction level parallelism. By eliminating conditional branches, branch penalties can be reduced and the size of the basic blocks can be increased, further facilitating compiler optimizations. Past work on predicated execution focused almost entirely on compiler issues. In this paper, we analyze the impact of predicated execution on the pipeline control of out-of-order and in-order superscalar machines. We show problems arising in implementing predication and propose both conservative and aggressive solutions.