Title :
Optimization and fabrication of planar edge termination techniques for a high breakdown voltage and low leakage current p-i-n diode
Author :
Chao, D.S. ; Hung, C.C. ; Shu, D.Y. ; Kao, M.J. ; Hsieh, W.Y. ; Tsai, M.-J. ; Wang, Benson ; Teng, Bill ; Tsai, H.P. ; Lin, Rick ; Chen, Max
Author_Institution :
Ind. Technol. Res. Inst., Electron. Res. & Service Organ., Hsinchu, Taiwan
Abstract :
The planar edge termination techniques of junction termination extension (JTE) and offset field plates and field-limiting rings (OFP-FLR) were investigated and optimized using a two-dimensional device simulator TMA MEDICI. By experimental verification, a good consistency between simulation and experiment can be observed. The results show that the p-i-n diode with an optimized JTE edge termination can accomplish near ideal breakdown voltage and much lower leakage current. The breakdown voltage can be higher than 1800 V, which achieves more than 90 percent of ideal parallel plane junction breakdown voltage, and the leakage current density can be as low as 2X10-4 A/cm2.
Keywords :
leakage currents; optimisation; p-i-n diodes; semiconductor device breakdown; field-limiting rings; junction breakdown voltage; junction termination extension; leakage current density; offset field plates; optimization; p-i-n diode; planar edge termination techniques; two-dimensional device simulator; Analytical models; Chaos; Electronics industry; Fabrication; Industrial electronics; Leakage current; Medical simulation; P-i-n diodes; P-n junctions; Power semiconductor devices;
Conference_Titel :
Applied Power Electronics Conference and Exposition, 2004. APEC '04. Nineteenth Annual IEEE
Print_ISBN :
0-7803-8269-2
DOI :
10.1109/APEC.2004.1295816
