• DocumentCode
    412887
  • Title

    Frequency-downconversion and IF channel selection A-DQS sample-and-hold pair for two-step-channel-select low-IF receiver

  • Author

    Mak, Pui-In ; Sou, Chi-Sam ; Seng-Pan, U. ; Marti, R.P.

  • Author_Institution
    Fac. of Sci. & Technol., Univ. of Macau, China
  • Volume
    2
  • fYear
    2003
  • fDate
    14-17 Dec. 2003
  • Firstpage
    479
  • Abstract
    A novel I/Q sample-and-hold (S/H) pair for a recently proposed two-step-channel-select low-IF receiver, which performs both IF-to-baseband frequency down-conversion and IF channel selection, will be presented. Both functions are mainly implemented through a controllable Analog-Double Quadrature Sampling (A-DQS) technique, which can effectively perform forward/backward frequency shifting through simple digital control. Thus, a new two-step channel selection method is proposed to significantly relax the front-end frequency synthesizer phase noise and locking time requirements, by partitioning the channel selection process from the FS to the proposed S/H pair. A prototype is designed in CADENCE™ environment with 0.35-μm CMOS process parameters and adopting various circuit techniques for minimization of the image problem due to the I/Q mismatch.
  • Keywords
    CMOS analogue integrated circuits; channel allocation; frequency convertors; frequency hop communication; frequency synthesizers; mixers (circuits); radio receivers; sample and hold circuits; A-DQS sample-and-hold pair; CADENCE; CMOS process parameters; I/Q mismatch; IF channel selection; common-mode feedback; controllable analog-double quadrature sampling; digital control; forward-backward frequency shifting; frequency hopping communication; frequency synthesizer; frequency-downconversion; front-end frequency synthesizer phase noise; image problem; locking time requirements; operational transconductance amplifiers; sampling mixers; two-step-channel-select low-IF receiver; Bandwidth; Circuits; Digital control; Frequency conversion; Frequency synthesizers; Image sampling; Phase noise; Samarium; Sampling methods; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
  • Print_ISBN
    0-7803-8163-7
  • Type

    conf

  • DOI
    10.1109/ICECS.2003.1301826
  • Filename
    1301826