Title :
Analytical technique for macrocell placement optimization with multiple constraints
Author_Institution :
Dept. of Electr. Eng., Ajman Univ. of Sci. & Technol., United Arab Emirates
Abstract :
An analytical technique is presented for optimizing the placement of macrocells without discretizing the 2-D plane or ignoring the dimensions of macrocells during the optimization process. The presented mathematical formulation incorporates the geometrical characteristics of the macrocells and optimization is carried out in continuous plane considering multiple constraints such as non-overlapping of macrocells, upper bounds on wirelengths and boundary constraints. The orientation of the macrocells is also optimized. The technique is computationally efficient and can solve large-sized placement problems on a PC.
Keywords :
VLSI; circuit layout CAD; circuit optimisation; integrated circuit layout; integrated logic circuits; VLSI floorplan design; analytical technique; boundary constraints; continuous plane; geometrical characteristics; large-sized placement problems; macrocell placement optimization; multiple constraints; nonoverlapping of macrocells; optimal orientation; upper bounds on wirelengths; Constraint optimization; Genetic algorithms; Macrocell networks; Optimization methods; Shape; Simulated annealing; Topology; Upper bound; Very large scale integration; Wire;
Conference_Titel :
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN :
0-7803-8163-7
DOI :
10.1109/ICECS.2003.1301832