DocumentCode :
41299
Title :
Z-TCAM: An SRAM-based Architecture for TCAM
Author :
Ullah, Zahid ; Jaiswal, Manish K. ; Cheung, Ray C. C.
Author_Institution :
Dept. of Electron. Eng., City Univ. of Hong Kong, Hong Kong, China
Volume :
23
Issue :
2
fYear :
2015
fDate :
Feb. 2015
Firstpage :
402
Lastpage :
406
Abstract :
Ternary content addressable memories (TCAMs) perform high-speed lookup operation but when compared with static random access memories (SRAMs), TCAMs have certain limitations such as low storage density, relatively slow access time, low scalability, complex circuitry, and are very expensive. Thus, can we use the benefits of SRAM by configuring it (with additional logic) to enable it to behave like TCAM? This brief proposes a novel memory architecture, named Z-TCAM, which emulates the TCAM functionality with SRAM. Z-TCAM logically partitions the classical TCAM table along columns and rows into hybrid TCAM subtables, which are then processed to map on their corresponding memory blocks. Two example designs for Z-TCAM of sizes 512 × 36 and 64 × 32 have been implemented on Xilinx Virtex-7 field-programmable gate array. The design of 64 × 32 Z-TCAM has also been implemented using OSUcells library for 0.18 μm technology, which confirms the physical and technical feasibility of Z-TCAM. Search latency for each design is three clock cycles. The detailed implementation results and power measurements for each design have been reported thoroughly.
Keywords :
SRAM chips; content-addressable storage; field programmable gate arrays; memory architecture; table lookup; OSUcells library; SRAM-based architecture; Xilinx Virtex-7; Z-TCAM; additional logic; clock cycles; field programmable gate array; high-speed lookup operation; hybrid TCAM subtables; memory architecture; memory blocks; power measurements; size 0.18 mum; static random access memories; ternary content addressable memories; Clocks; Computer aided manufacturing; Computer architecture; Field programmable gate arrays; Libraries; Random access memory; Very large scale integration; Application-specific integrated circuit (ASIC); field-programmable gate array (FPGA); memory architecture; priority encoder; static random access memory (SRAM)-based TCAM; ternary content addressable memory (TCAM); ternary content addressable memory (TCAM).;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2014.2309350
Filename :
6774983
Link To Document :
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