DocumentCode
41314
Title
A Digital Switching Demodulator for Electrical Capacitance Tomography
Author
Lijun Xu ; Haili Zhou ; Zhang Cao ; Wuqiang Yang
Author_Institution
Minist. of Educ.´s Key Lab. of Precision Opto-Mechatron. Technol., Beihang Univ., Beijing, China
Volume
62
Issue
5
fYear
2013
fDate
May-13
Firstpage
1025
Lastpage
1033
Abstract
In this paper, a digital switching demodulator is presented for use in ac-based electrical capacitance tomography systems. Implementing a switching phase-sensitive demodulator (PSD) digitally offers the following advantages: 1) Demodulation can be implemented using a programmable digital device, and hence, CMOS switches, which are used in a conventional switching PSD, are no longer needed; 2) compared with the widely used digital quadrature PSD, this proposed demodulator is simple in configuration because neither a reference signal nor multiplication is required; 3) according to the specific requirements, the new demodulator can be implemented in two operation modes, i.e., the amplitude mode and the phase-sensitive mode; and 4) because only subtractions and accumulations are needed, the proposed demodulator can be easily implemented with low-cost logic devices, e.g., a complex programmable logic device (CPLD). By simulation, the feasibility and effectiveness of the proposed demodulator have been confirmed. CPLD-based and field-programmable-gate-array-based capacitance measurement circuits are constructed, and the performances of different demodulation methods are compared. Both simulation and experiment show that the proposed demodulator can provide demodulation results with high signal-to-noise ratio. The system design can be simplified using the digital switching demodulator.
Keywords
CMOS integrated circuits; capacitance measurement; computerised tomography; demodulators; programmable logic devices; CMOS switches; CPLD; ac-based electrical capacitance tomography systems; complex programmable logic device; digital quadrature PSD; digital switching demodulator; field-programmable-gate-array-based capacitance measurement circuit; high signal-to-noise ratio; low-cost logic devices; programmable digital device; switching phase-sensitive demodulator; Capacitance measurement; Demodulation; Field programmable gate arrays; Signal to noise ratio; Switches; Switching circuits; Capacitance measurement; complex programmable logic device (CPLD); digital demodulator; electrical capacitance tomography (ECT); phase-sensitive demodulation;
fLanguage
English
Journal_Title
Instrumentation and Measurement, IEEE Transactions on
Publisher
ieee
ISSN
0018-9456
Type
jour
DOI
10.1109/TIM.2012.2236731
Filename
6428690
Link To Document