Rise of dislocation density in crystalline silicon wafers during diffusion processing

It is the common sense, that dislocations in crystalline silicon wafers are originated during crystallization. In this paper we show that there an be a further rise of dislocation density during diffusion processing. We found this result by numerical simulations and production near experiments, exemplary for tri-crystal wafers. We performed temperature measurements during the loading stage into a horizontal tube diffusion furnace and found temperature differences up to 150/spl deg/C between wafers edge and center. This temperature difference induces thermal stress, which can activate dislocation multiplication. We calculate this multiplication with our simulation tools and estimate a rise in dislocation density from 1.2/spl times/10/sup 5/ cm/sup -2/, originated from crystallization, up to 1.0/spl times/10/sup 7/ cm/sup -2/ generated during the diffusion process. Additionally, we drive experiments in diffusion furnaces under production near conditions to validate the simulations. We found a remarkable rise of dislocation density at process temperatures of about 1000/spl deg/C. These experimental results are in good agreement with our simulations. In summary, our work gives a strong advice to solar cell industry to investigate the microstructure of their wafers before and after diffusion processing. Especially, if those processes are driven at 1000/spl deg/C or higher. A rise of dislocation density has to be excluded in any case to achieve a high solar cell performance.