DocumentCode
415517
Title
Advanced junction isolation structures for Power Integrated Circuit technology
Author
Mawby, P.A. ; Starke, T.K.H. ; Holland, P.M. ; Hussain, S. ; Jamal, W.M. ; Igic, P.M.
Author_Institution
Sch. of Eng., Univ. of Wales, Swansea, UK
Volume
1
fYear
2004
fDate
16-19 May 2004
Firstpage
17
Abstract
This paper describes recent experimental work carried on the optimisation of junction isolation structures for use in Power Integrated Circuits. Isolation is required to collect minority carriers injected into the substrate before the can reach the low voltage control circuitry. The most effect form of isolation found in this paper combines A number of techniques (SJI & MAAP) to reduce the injected current by3 orders of magnitude compared with the standard junction isolation techniques.
Keywords
power integrated circuits; power semiconductor diodes; semiconductor junctions; MAAP; Power Integrated Circuit technology; SJI; advanced junction isolation structures; collect minority carriers; low voltage control circuitry; CMOS technology; Dielectric devices; Dielectric substrates; Integrated circuit technology; Isolation technology; Low voltage; Power integrated circuits; Power transistors; Protection; Silicon on insulator technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2004. 24th International Conference on
Print_ISBN
0-7803-8166-1
Type
conf
DOI
10.1109/ICMEL.2004.1314550
Filename
1314550
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