Title :
Novel 2-D RESURF LDMOSFET in 0.6 μm CMOS technology for power ICs
Author :
Holland, P.M. ; Starke, T.K.H. ; Hussain, S. ; Jamal, W.M. ; Mawby, P.A. ; Igic, P.M.
Author_Institution :
Dept. of Electr. Eng., Univ. of Wales Swansea, UK
Abstract :
A 0.6 μm CMOS process was adapted to incorporate LDMOS transistors for Power Integrated Circuit Applications. The design was realised by adding only three additional ion implants process steps and one extra masking process step providing a cost effective approach. The design was optimised prior to manufacture by the Avanti TCAD simulation tool. Physical results show good agreement with the simulated device and display 2-D RESURF action.
Keywords :
CMOS integrated circuits; integrated circuit modelling; power integrated circuits; technology CAD (electronics); 0.6 μm CMOS technology; 0.6 micron; 2-D RESURF LDMOSFET; Avanti TCAD simulation; cosi: effective approach; ion implants process steps; masking process step; power ICs; CMOS process; CMOS technology; Circuit simulation; Costs; Design optimization; Displays; Implants; Integrated circuit technology; Power integrated circuits; Virtual manufacturing;
Conference_Titel :
Microelectronics, 2004. 24th International Conference on
Print_ISBN :
0-7803-8166-1
DOI :
10.1109/ICMEL.2004.1314572
