DocumentCode
415539
Title
Three-dimensional topography simulation for deposition and etching processes using a level set method
Author
Sheikholeslami, A. ; Heitzinger, C. ; Grasser, T. ; Selberherr, S.
Author_Institution
Inst. for Microelectron., Tech. Univ. Vienna, Austria
Volume
1
fYear
2004
fDate
16-19 May 2004
Firstpage
241
Abstract
We present, the application of level set and fast marching methods to the simulation of surface topography of a wafer in three dimensions for deposition and etching processes. These simulations rest on many techniques, including a narrow band level set method, fast marching for the Eikonal equation, extension of the speed function, transport models, visibility determination, and an iterative equation solver.
Keywords
integrated circuit modelling; integrated circuit testing; surface topography measurement; Eikonal equation; deposition; etching processes; fast marching methods; iterative equation solver; level set method; narrow band level set method; speed function; three-dimensional topography simulation; transport models; visibility determination; Computational modeling; Equations; Etching; Level set; Microelectronics; Narrowband; Rough surfaces; Solid modeling; Surface roughness; Surface topography;
fLanguage
English
Publisher
ieee
Conference_Titel
Microelectronics, 2004. 24th International Conference on
Print_ISBN
0-7803-8166-1
Type
conf
DOI
10.1109/ICMEL.2004.1314606
Filename
1314606
Link To Document