DocumentCode :
415629
Title :
Hole trapping effect on methodology for DC and AC negative bias temperature instability measurements in PMOS transistors
Author :
Huard, V. ; Denais, M.
Author_Institution :
Philips Semicond., Crolles, France
fYear :
2004
fDate :
25-29 April 2004
Firstpage :
40
Lastpage :
45
Abstract :
This works presents a thorough study of adequate methodology to be used in order to characterize the NBTI degradation by taking into account the transient effects. The hole trapping/detrapping effect on previously existent traps is the dominant origin of the transient effect and not the interface traps passivation by hydrogen atoms diffusing back to the interface.
Keywords :
MOSFET; hole traps; interface states; semiconductor device breakdown; semiconductor device reliability; AC negative bias temperature instability; DC negative bias temperature instability; PMOS transistors; hole trapping effect; hole trapping/detrapping effect; transient effects; Current measurement; Degradation; Density measurement; MOSFETs; Negative bias temperature instability; Niobium compounds; Stress measurement; Temperature measurement; Threshold voltage; Titanium compounds;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
Print_ISBN :
0-7803-8315-X
Type :
conf
DOI :
10.1109/RELPHY.2004.1315299
Filename :
1315299
Link To Document :
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