Performance and Variability of Doped Multithreshold FinFETs for 10-nm CMOS

In this paper, by means of simulation, we have studied the implications of using channel doping to control the threshold voltage and the leakage current in bulk silicon FinFETs suitable for the 10-nm CMOS technology generation. The channel doping level of high-performance FinFETs designed for 100-nA/μm leakage current has been increased to achieve 10 and 1-nA/μm leakage currents. Ensemble Monte Carlo (EMC) simulations are used to estimate the impact of the increased doping on the transistor performance. Atomistic drift-diffusion simulations calibrated to the results of the EMC simulations are used to evaluate the impact of random discrete dopants, line edge roughness, and metal gate granularity on the statistical variability. The results of the statistical variability simulations are also used to highlight errors resulting from the use of continuous doping in the TCAD simulation of advanced CMOS technology generation FinFETs.