Challenges in chip/processor level thermal engineering

In order to continue on the path as charted by Gordon Moore, several improvements in CMOS performance are being implemented in some microprocessor chips. Four techniques are seen as advancements that helps in the continuation of the Moore´s law. These include the use of silicon dioxide insulator, copper lithography replacing aluminium lines, low temperature cooling and finally double gate transistor. These four techniques for device improvement are actively being pursued or implemented in computer hardware designs. The thermal design goal is to limit the magnitude of the chip temperature rise above ambient temperature in order to ensure satisfactory electrical circuit operation and reliability. To further increase these challenges a new phenomena has recently been encountered. Given the radical sub threshold leakage currents and associated power induced by burn in voltages and temperatures, recent modeling analysis has predicted that the intense localized heating effect at burn in can cause regions of the chip to reach very high temperature, thereby further exacerbating the reliability.