Emerging challenges of underfill for flip chip application

The emerging challenges of underfill technology development for future generations of flip chip applications are reviewed, including capillary underfill materials, underfill processes, and alternative underfill technology. The driving trends of silicon technologies such as copper damascene, low-k dielectrics, low power consumption, and packaging technologies, including shrinking flip chip bump pitch, diameter and gap height, lead-free interconnection, thin die, small form factor and low profile packaging continue to demand innovations in underfill materials, processes, and integration approaches for the technologies.