Characterization of discrete decoupling capacitors for high-speed digital systems

This paper describes frequency-dependent characterization of multi-terminal decoupling capacitors (2, 8, 14, and any arbitrary number of terminals) by using a full-wave tool developed at Intel. This tool can capture high frequency effects with fast CPU run time, which enables accurate modeling of the power delivery system. The full-wave S-parameters have been validated with the measurements and the modeled data obtained from a commercial tool (HFSS). Based on its fast and accurate solution, different design configurations of capacitors have been studied to identify the optimal configuration which maximizes the performance of the decoupling capacitor. To capture the frequency-dependent behavior of capacitor impedance, a higher order representation made up with 7 or 9 elements of RLGC was developed. This circuit representation was used to assess the accuracy of the conventional series lumped RLC capacitor model. Finally, the responses were incorporated into a high performance microprocessor power delivery network to investigate system performance.