DocumentCode
415971
Title
Thin film low inductance decoupling device for high speed digital circuits
Author
Takafuji, J. ; Konushi, S. ; Nakashima, H. ; Ueda, S. ; Fukumaru, F. ; Nambu, S.
Author_Institution
R&D Center Keihanna, Kyocera Corp., Kyoto, Japan
Volume
1
fYear
2004
fDate
1-4 June 2004
Firstpage
277
Abstract
This paper describes a thin film low inductance decoupling device (TLD), developed for high speed digital circuits. The increasingly faster edge rates of today´s high speed digital devices require high-performance decoupling capacitors to supply sufficient instantaneous local current, very low inductance, and low impedance at high frequencies. The TLD uses multi layered dielectric layers to achieve high capacitance and fine-pitch BGA terminals to achieve low inductance. Using a numerical implementation of the partial element equivalent circuit method to design the electrodes and terminals, and using a sputtering process to generate dielectric layers, (Ba,Sr)TiOx (k=700), capacitance and inductance values of 0.33 μF (6.6 μF/cm2) and under 20 pH (1 pH×cm2), respectively, were achieved.
Keywords
ball grid arrays; dielectric thin films; equivalent circuits; fine-pitch technology; multilayers; thin film capacitors; (BaSr)TiO; 0.33 muF; PEEC method; TLD; decoupling capacitors; dielectric layer sputtering process; fine-pitch BGA terminals; high speed digital circuits; low impedance capacitors; multilayered dielectric layers; partial element equivalent circuit method; thin film low inductance decoupling device; Capacitance; Capacitors; Dielectric thin films; Digital circuits; Equivalent circuits; Frequency; Impedance; Inductance; Thin film circuits; Thin film devices;
fLanguage
English
Publisher
ieee
Conference_Titel
Electronic Components and Technology Conference, 2004. Proceedings. 54th
Print_ISBN
0-7803-8365-6
Type
conf
DOI
10.1109/ECTC.2004.1319351
Filename
1319351
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