G-helix: lithography-based wafer-level compliant chip-to-substrate interconnects

In this work, the fabrication and the reliability of 100 μm pitch compliant off-chip G-helix interconnects are presented. A three-mask process was used to successfully fabricate the free-standing compliant interconnect at a pitch of 100 μm. The geometry of the interconnect was optimized for mechanical and electrical performance. Also, a thermo-mechanical reliability simulation was performed. It was seen from the simulations that the G-helix interconnect assembly on an organic substrate, without the use of an underfill, could last more than 1000 thermal cycles.