DocumentCode
416096
Title
SERDES technology for gigabit I/O communications in storage area networking
Author
Iniewski, K. ; Badalone, R. ; Lapointe, M. ; Syrzycki, M.
Author_Institution
Dept. of Electr. & Comput. Eng., Alberta Univ., Edmonton, Alta., Canada
fYear
2004
fDate
19-21 July 2004
Firstpage
247
Lastpage
252
Abstract
The paper reviews SERDES technology for storage area networking. A concept of a data switch is introduced to illustrate important role played by switching and backplane SERDES ICs. Selected state-of-the-art devices: 10 Gb/s line side SERDES and backplane drivers are discussed in detail. Particular emphasis is placed on challenges associated with design of high-speed mixed-signal circuitry.
Keywords
integrated circuit design; local area networks; mixed analogue-digital integrated circuits; storage area networks; switches; 1.1E10 bit/s; I/O communications; SERDES IC; SERDES technology; backplane drivers; data switch; mixed-signal circuitry; storage area networking; Backplanes; Fabrics; Intelligent networks; Optical fiber LAN; Optical fiber communication; Optical fiber devices; Optical fibers; Optical packet switching; Optical switches; Paper technology;
fLanguage
English
Publisher
ieee
Conference_Titel
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN
0-7695-2182-7
Type
conf
DOI
10.1109/IWSOC.2004.1319888
Filename
1319888
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