Title :
A customizable embedded SoC platform architecture
Author :
Nsame, Pascal ; Savaria, Yvon
Author_Institution :
Dept. of EE, Ecole Polytechnique, Montreal, Que., Canada
Abstract :
In this paper, we present a general purpose and customizable IP platform, with hardware support for multiprocessors, multithreading and real-time applications. It integrates essential elements of a scalable SoC software and hardware architecture. The communication structure is based on virtual channels. As a result, the latencies across the software and hardware resources are significantly reduced. We use queues to communicate between functional units (or IP cores) in order to facilitate timing closure and verification.
Keywords :
hardware-software codesign; multi-threading; multiprocessing systems; queueing theory; real-time systems; reconfigurable architectures; system-on-chip; IP cores; customizable SoC platform architecture; embedded SoC platform architecture; multiprocessors; multithreading; real-time applications; virtual channels; Application software; Computer architecture; Delay; Design optimization; Hardware; Processor scheduling; System-on-a-chip; Timing; Topology; Wire;
Conference_Titel :
System-on-Chip for Real-Time Applications, 2004.Proceedings. 4th IEEE International Workshop on
Print_ISBN :
0-7695-2182-7
DOI :
10.1109/IWSOC.2004.1319898
