Co-design optimization of laminate substrates for high speed applications

Author

de Araujo, D.N. ; Cases, M. ; Pham, N. ; Matoglu, E.

Author_Institution

IBM Corp., Austin, TX, USA

Volume

2

fYear

2004

fDate

1-4 June 2004

Firstpage

1776

Abstract

The need for optimization of electronic package solutions for digital applications is rapidly increasing as the electrical interfaces advance in complexity, speed, cost, and performance. Higher density and integration of functionality within a single chip requires the balance of various requirements for several different interfaces. Optimization of a laminate organic package for high speed application is presented. Results of this optimization are presented, as well as a discussion of the choices from the study.

Keywords

application specific integrated circuits; circuit optimisation; cost-benefit analysis; crosstalk; electric impedance; integrated circuit design; integrated circuit packaging; laminates; substrates; ASIC; codesign optimization; cost effective; design challenges; electrical interface complexity; electronic package; high speed applications; laminate organic package; laminate substrates; near-end crosstalk; power distribution requirements; signal distribution; signal trace impedance; simulation methodology; single-ended stripline; Bandwidth; Conducting materials; Cost function; Design optimization; Dielectric materials; Electronics packaging; Impedance; Laminates; Plastic packaging; Routing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronic Components and Technology Conference, 2004. Proceedings. 54th

Print_ISBN

0-7803-8365-6

Type

conf

DOI

10.1109/ECTC.2004.1320359

Filename

1320359