• DocumentCode
    416220
  • Title

    Requirement-based design methods for adaptive communications links

  • Author

    Carballo, J.A. ; Nowka, K. ; Seung-Moon Yoo ; Vo, I. ; Cranford, C. ; Norman, R.

  • Author_Institution
    IBM Austin Research Laboratory, Austin, TX
  • fYear
    2004
  • fDate
    7-11 July 2004
  • Firstpage
    93
  • Lastpage
    98
  • Abstract
    High-speed communications link cores must consume low-power, feature, low bit-error-rates (BER), and address many applications. We pFsent a methodology to design adaptive link architectures, whereby the link´s intemal logic complexity, frequency, and supply are simultaneously adapted to application requirements. The requirement space is mapped to the design space using requirements measurement circuits and configurable logic blocks. CMOS results indicatk that power savings of 60% versus the worst case arc Dossible. while the area overhead is keot under 5%.
  • Keywords
    Bit error rate; CMOS logic circuits; Clocks; Design methodology; Frequency; Jitter; Laboratories; Logic design; Space technology; Voltage;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2004. Proceedings. 41st
  • Conference_Location
    San Diego, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    1-51183-828-8
  • Type

    conf

  • Filename
    1322449