Title :
Statistical timing analysis based on a timing yield model
Author :
Najm, F.N. ; Menezes, N.
Author_Institution :
University of Toronto, Canada
Abstract :
Starting from a model of the within-die systematic variations using principal components analysis, a model is proposed for estimation of the parametric yield, and is then applied to estimation of the timing yield. Key features of these models are that they are easy to compute, they include a powerful model of within-die correlation, and they are "full-chip" models in the sense that they can be applied with ease to circuits with millions of components. As such, these models provide a way to do statistical timing analysis without the need for detailed statistical analysis of every path in the design.
Keywords :
Algorithm design and analysis; Circuit testing; Integrated circuit manufacture; Integrated circuit yield; Permission; Power system modeling; Principal component analysis; Statistical analysis; Timing; Yield estimation;
Conference_Titel :
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location :
San Diego, CA, USA
Print_ISBN :
1-51183-828-8