DocumentCode

416294

Title

On test generation for transition faults with minimized peak power dissipation

Author

Li, Wei ; Reddy, Sudhakar M. ; Pomeranz, Irith

Author_Institution

Univ. of Iowa, USA

fYear

2004

fDate

7-11 July 2004

Firstpage

504

Lastpage

509

Keywords

Circuit faults; Circuit testing; Cities and towns; Clocks; Fault detection; Flip-flops; Permission; Power dissipation; Power generation; Propagation delay;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2004. Proceedings. 41st

Conference_Location

San Diego, CA, USA

ISSN

0738-100X

Print_ISBN

1-51183-828-8

Type

conf

Filename

1322533