DocumentCode
416351
Title
A new heuristic algorithm for reversible logic synthesis
Author
Kerntopf, Pawel
Author_Institution
Warsaw University of Technology, Poland
fYear
2004
fDate
7-11 July 2004
Firstpage
834
Lastpage
837
Keywords
Boolean functions; Circuit synthesis; Cost function; Data structures; Heuristic algorithms; Libraries; Logic; Quantum computing; Signal processing algorithms; Signal synthesis;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 2004. Proceedings. 41st
Conference_Location
San Diego, CA, USA
ISSN
0738-100X
Print_ISBN
1-51183-828-8
Type
conf
Filename
1322598
Link To Document