• DocumentCode
    416364
  • Title

    A novel technique to improve noise immunity of CMOS dynamic logic circuits

  • Author

    Ding, Li ; Mazurnder, P.

  • Author_Institution
    University of Michigan, Ann Arbor
  • fYear
    2004
  • fDate
    7-11 July 2004
  • Firstpage
    900
  • Lastpage
    903
  • Keywords
    CMOS logic circuits; Circuit noise; Circuit testing; Integrated circuit reliability; Logic circuits; Logic design; Logic gates; Noise level; Threshold voltage; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference, 2004. Proceedings. 41st
  • Conference_Location
    San Diego, CA, USA
  • ISSN
    0738-100X
  • Print_ISBN
    1-51183-828-8
  • Type

    conf

  • Filename
    1322611
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=416364