• DocumentCode
    416964
  • Title

    Vision chip architecture for simultaneous output of multi-target positions

  • Author

    Watanabe, Yoshihiro ; Komuro, Takashi ; Kagami, Shingo ; Ishikawa, Masatoshi

  • Author_Institution
    Tokyo Univ., Japan
  • Volume
    2
  • fYear
    2003
  • fDate
    4-6 Aug. 2003
  • Firstpage
    1572
  • Abstract
    In this paper, we describe new vision chip architecture, which enables simultaneous output of multi-target positions. This architecture selects targets that don´t overlap at each other in the direction of the column and extracts the target positions simultaneously. Thanks to this simultaneous output, the vision chip based on the architecture can obtain many target positions at high-speed. On that point, this vision chip will be useful in wide field of applications in the future.
  • Keywords
    computer vision; digital signal processing chips; feature extraction; target tracking; feature extraction; multitarget positions; target selection; vision chip architecture;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SICE 2003 Annual Conference
  • Conference_Location
    Fukui, Japan
  • Print_ISBN
    0-7803-8352-4
  • Type

    conf

  • Filename
    1324207