Modelling of the impact of the current source output impedance on the SFDR of current-steering CMOS D/A converters

Author

Chen, Tao ; Gielen, Georges

Author_Institution

K.U. Leuven, Belgium

Volume

1

fYear

2004

fDate

23-26 May 2004

Abstract

A behaviour-level model of a thermometric DAC with acceptable complexity and sufficient accuracy is presented in this paper. The impact of the current sources´ internal poles on the SFDR is described in the model. With this model, the sensitivity of the SFDR to some unideal factors such as the parasitic capacitors in the internal point, and the variation of the internal points´ voltages, can be observed directly. Furthermore, this model can be used for the verification of the possible solutions for the output impedance problem, and is therefore necessary for future work.

Keywords

CMOS integrated circuits; circuit analysis computing; circuit complexity; digital-analogue conversion; CMOS DAC; SFDR; behaviour-level model; current source output impedance; current-steering DAC; internal points; internal poles; output impedance problem; parasitic capacitors; thermometric DAC; Capacitors; Dynamic range; Electronic mail; Frequency; Impedance; Mathematical analysis; Mathematical model; Semiconductor device modeling; Transconductance; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1328189

Filename

1328189