DocumentCode :
418030
Title :
Applications of tree/link partitioning for moment computations of general lumped RLC networks with resistor loops
Author :
Lee, Herng-Jer ; Lai, Ming-Hong ; Chu, Chia-Chi ; Feng, Wu-Shiung
Author_Institution :
Dept. of Electr. Eng., Chang Gung Univ., Taiwan
Volume :
1
fYear :
2004
fDate :
23-26 May 2004
Abstract :
A new moment computation technique for general lumped circuits with resistor loops is proposed. Using the concept of tearing, a lumped network can be portioned into a spanning tree and several resistor links. The contributions of network moments from each tree and the corresponding links can be determined independently. By combining the conventional moment computation algorithms and the reduced ordered binary decision diagram (ROBDD), the proposed method can compute system moments efficiently.
Keywords :
RLC circuits; binary decision diagrams; circuit complexity; lumped parameter networks; method of moments; reduced order systems; trees (mathematics); general lumped circuits; lumped RLC networks; lumped network portioning; moment computation algorithm; network moments; reduced ordered binary decision diagram; resistor links; resistor loops; spanning tree; tree-link partitioning; Boolean functions; Capacitors; Character generation; Computer networks; Data structures; Dielectric losses; Integrated circuit interconnections; RLC circuits; Resistors; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1328294
Filename :
1328294
Link To Document :
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