A 0.8μm CMOS programmable IIR SC filter

The design of a 0.8μm standard CMOS digitally programmable switched-capacitor recursive (IIR) filter is presented. A digital-to-analog conversion technique, instead conventional capacitor banks, is adopted so that power consumption and silicon area savings are achieved. Using transfer functions with only two poles and positioning zeros structurally on the unit circle, the described design technique ensures low sensitivity in both passband and stopband frequencies. Moreover, non-ideal effects, such as charge injection and opamp offset voltages, are greatly reduced by using a fully differential filter structure. Experimental results verifying the feasibility of the proposed approach are included.