A 4th order single-loop delta-sigma ADC with 8-bit two-step flash quantization

An architecture for a multibit single-loop delta-sigma A/D converter with two-step internal quantization is presented. Both the MSB and LSB signals produced by the two-step quantization are fed back simultaneously to all integrator stages. Thus the problem of inter-stage quantization noise leakage, which limits the performance of cascaded delta-sigma architectures, is avoided. Behavioral simulation results demonstrate that for a 4th-order, 8-bit modulator, 108 dB of signal-to-quantization noise is achievable at an oversampling ratio of 8.