R&D platform for man scale wireless AD HOC networks towards a hardware demonstrator for 4G+ systems

Author

Rauschert, P. ; Honarbacht, A. ; Kummert, A.

Author_Institution

Commun. Theor., Wuppertal Univ., Germany

Volume

4

fYear

2004

fDate

23-26 May 2004

Abstract

A hardware demonstrator for 4G and beyond wide area networking systems, based on a software defined radio system with multi-hop and multi-mode options, is the scope of this paper. Several results from different research groups, great progress in the VLSI design and experience with already approved versions of hardware demonstrators point out the way to a new, more sophisticated approach. Combining different technologies, like ASICs, FPGAs, microprocessors and DSPs enables a step-by-step system-on-chip (SoC) approach for communication systems with cross-layer design towards 4G+. Great flexibility, observability and debugging features are guaranteed to facilitate rapid prototyping.

Keywords

4G mobile communication; VLSI; ad hoc networks; application specific integrated circuits; digital signal processing chips; field programmable gate arrays; radio networks; system-on-chip; 4G mobile communication; ASIC; DSP; FPGA; VLSI design; communication systems; cross-layer design; hardware demonstrator; microprocessor; networking system; prototype; radio system; system-on-chip; wireless AD HOC network; Digital signal processing; Field programmable gate arrays; Hardware; Microprocessors; Mobile ad hoc networks; Research and development; Software radio; Spread spectrum communication; System-on-a-chip; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on

Print_ISBN

0-7803-8251-X

Type

conf

DOI

10.1109/ISCAS.2004.1329033

Filename

1329033