DocumentCode :
418466
Title :
Digital controlled analog architecture for DCT and DST using capacitor switching
Author :
Basu, Arindam ; Mal, Ashis Kumar ; Dhar, Anindya Sundar
Author_Institution :
Dept. of Electron. & Electr. Commun. Eng., IIT, Kharagpur, India
Volume :
2
fYear :
2004
fDate :
23-26 May 2004
Abstract :
This paper describes a sampled analog architecture, for computing DCT or DST, using switched capacitor principle with capacitance switching. The input sample stream is applied to an array of capacitors and multiplied by all the DCT/DST coefficients concurrently using capacitor ratios. These capacitors are switched properly with the help of a switching matrix, to realize switched capacitor integrators for performing necessary addition/subtraction. Proposed architecture simple, regular with lower gate count may be used for online computations.
Keywords :
capacitor switching; capacitors; discrete cosine transforms; integrating circuits; switched capacitor networks; DCT; DST; capacitor switching; capacitors array; digital controlled analog architecture; switched capacitor integrators; switching matrix; Analog computers; Capacitors; Clocks; Communication switching; Computer architecture; Digital control; Discrete cosine transforms; Kernel; Switches; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
Type :
conf
DOI :
10.1109/ISCAS.2004.1329270
Filename :
1329270
Link To Document :
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