DocumentCode
418507
Title
Effect of relative delay on the dissipated energy in coupled interconnects
Author
Ghoneima, Maged ; Ismail, Yehea
Author_Institution
Northwestern Univ., Evanston, IL, USA
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
This paper presents a comprehensive qualitative and analytical analysis of the effect of relative delay on the dissipated energy due to relative switching of on-chip buses. A closed form expression modeling the effect of relative delay on the dissipated energy is also presented. Introducing a relative delay between signals on adjacent bus lines is found to only affect the switching cases in which the neighboring lines switch in the same or opposite direction. The delay is shown to provide a reduction up to 50% in the energy dissipation due to relative switching of the worst switching case. This observation can be implemented in low-power on-chip bus schemes.
Keywords
CMOS integrated circuits; circuit switching; integrated circuit interconnections; integrated circuit modelling; low-power electronics; system buses; system-on-chip; analytical analysis; comprehensive qualitative analysis; coupled interconnects; dissipated energy; low-power electronics; relative delay; switching; system on-chip buses; Capacitance; Capacitors; Clocks; Delay effects; Energy consumption; Energy dissipation; Semiconductor device modeling; Switches; System-on-a-chip; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329324
Filename
1329324
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