Title :
A high speed ASIC implementation of the Rijndael algorithm
Author :
Sever, Refik ; Ismailoglu, A. Neslin ; Tekmen, Yusuf C. ; Askar, Murat
Author_Institution :
TUBITAK-BILTEN, Ankara, Turkey
Abstract :
In this study, a non-pipelined implementation of the Rijndael Algorithm, which is selected to be the new Advanced Encryption Algorithm (AES) by the National Institute of Standards and Technology (NIST) in October 2000, is presented. Both the encryption and the decryption algorithms of Rijndael are implemented on a single ASIC. Using 149 K gates in a 0.35-μm standard CMOS process, we have reached a 132 MHz worst-case clock speed yielding 2.41 Gbit/s non-pipelined throughput in both encryption and decryption.
Keywords :
CMOS integrated circuits; application specific integrated circuits; cryptography; high-speed integrated circuits; 0.35 micron; 132 MHz; 149 K; 2.41 Gbit/s; National Institute of Standards and Technology; Rijndael algorithm; advanced encryption algorithm; decryption algorithm; high speed ASIC; standard CMOS process; Application specific integrated circuits; CMOS process; Clocks; Cryptography; Hardware; NIST; Pipelines; Silicon; Throughput; US Government;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329328
