DocumentCode
418537
Title
Reduced binary tree FIR Filters
Author
Wróblewski, Artur ; Wróblewski, Marek ; Saas, Christoph ; Nossek, Josef A.
Author_Institution
Munich Univ. of Technol., Germany
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
In this paper we propose a novel implementation of FIR Filters based on parallel input serial output structure. Several simplifications have been achieved due to using reduced binary tree multipliers. Properties common to all coefficients of a filter have been exploited to modify and improve the performance of the structure as well as to decrease both the area and power consumption when compared to a state-of-the-art implementation.
Keywords
FIR filters; power consumption; binary tree FIR filters; binary tree multipliers; finite impulse response; parallel input serial output structure; power consumption; Application software; Binary trees; Computational complexity; Delay; Digital filters; Energy consumption; Filtering; Finite impulse response filter; Frequency; Power filters;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329393
Filename
1329393
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