DocumentCode
418543
Title
A novel radix-4 bit-level modular multiplier for fast RSA cryptosystem
Author
Hong, Jin-Hua ; Tsai, Bin-Yan ; Lu, Liang-Te ; Shieh, Shao-Hui
Author_Institution
Dept. of Electr. Eng., Nat. Univ. of Kaohsiung, Taiwan
Volume
2
fYear
2004
fDate
23-26 May 2004
Abstract
Based on modified Booth´s algorithm, a radix-4 cellular-array modular multiplier to fulfill the radix-4 modular multiplication algorithm is designed. We implement the modular multiplier in bit level and get rid of the extra control signals shown in by using the concept of guard bits. The radix-4 modular multiplier can be used to implement fast RSA cryptosystem. Due to reduced number of iterations and pipelining, our modular multiplier is four times faster than the cellular-array modular multiplier based on the original Montgomery´s algorithm. The time to calculate a modular exponentiation is about n2 clock cycles, where n is the word length, and the clock cycle is roughly equal to the delay time of a full adder. The utilization of the multiplier is 100% by interleaving consecutive exponentiations.
Keywords
cellular arrays; cryptography; multiplying circuits; pipeline arithmetic; Booth algorithm; Montgomery algorithm; bit level; clock cycles; control signals; delay time; fast RSA cryptosystem; full adder; guard bits; iterative methods; multiplication algorithm; radix-4 cellular array modular multiplier; word length; Algorithm design and analysis; Clocks; Cryptography; Delay effects; Interleaved codes; Pipeline processing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN
0-7803-8251-X
Type
conf
DOI
10.1109/ISCAS.2004.1329402
Filename
1329402
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