Title :
On board processor development for NASA´s spaceborne imaging radar with VLSI system-on-chip technology
Author :
Fang, Wai-Chi ; Jin, Michael Y.
Author_Institution :
Jet Propulsion Lab., California Inst. of Technol., Pasadena, CA, USA
Abstract :
This paper reports a preliminary study result of an on-board spaceborne SAR processor. It consists of a processing requirement analysis, functional specifications, and implementation with VLSI system-on-chip technology. Finally, a minimum version of this VLSI on-board processor designed for performance evaluation and for partial demonstration is illustrated.
Keywords :
VLSI; microprocessor chips; radar imaging; spaceborne radar; synthetic aperture radar; system-on-chip; NASA spaceborne imaging radar; VLSI system-on-chip technology; functional specifications; on board processor development; on-board spaceborne SAR processor; performance evaluation; processing requirement analysis; Azimuth; Chirp; NASA; Propulsion; Radar imaging; Space technology; Spaceborne radar; Strips; System-on-a-chip; Very large scale integration;
Conference_Titel :
Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on
Print_ISBN :
0-7803-8251-X
DOI :
10.1109/ISCAS.2004.1329418
