Forward body biased keeper for enhanced noise immunity in domino logic circuits

A forward body biased keeper circuit technique is proposed in this paper for enhancing the robustness of dynamic circuits. The proposed circuit technique is evaluated as an alternative to the standard approach of increasing the physical size of a keeper transistor for enhanced noise immunity. The forward body biased keeper circuit technique has a lower speed penalty under the same noise immunity conditions as compared to a standard keeper sizing technique. The effectiveness of the proposed circuit technique can be further increased provided that the junction temperature is reduced using active cooling and refrigeration.