Title :
DFF-drivers ICs for 40 Gb/s ETDM in InP DHBT technology
Author :
Konczykowska, A. ; Jorge, F. ; Riet, M. ; Blayac, S. ; Moulu, J. ; Godin, J.
Author_Institution :
Alcatel R&I/OPTO+, Marcousis, France
Abstract :
In this paper we present design and optimization of 40+ Gb/s ICs in the context of ETDM transmission. The integration of DFF and driver with 2×1.4V and 2×2V output swing is presented with a focus on driver design, optimization and swing/quality/power tradeoffs. Circuits were fabricated in a self-aligned InP DHBT technology. DFF-driver measurements at 40 Gb/s show that low power consumption drivers with extremely low added jitter were achieved.
Keywords :
III-V semiconductors; bipolar integrated circuits; circuit optimisation; driver circuits; flip-flops; heterojunction bipolar transistors; indium compounds; integrated circuit design; low-power electronics; time division multiplexing; very high speed integrated circuits; 40 Gbits/s; DFF-drivers integrated circuits; DHBT technology; ETDM transmission; InP; bipolar integrated circuits; circuit optimization; digital circuit; driver design; electrical time division multiplex; flip-flop; indium compounds; integrated circuit design; jitter; output swing; power consumption drivers; very high-speed integrated circuits; Circuit simulation; DH-HEMTs; Design optimization; Differential amplifiers; Driver circuits; Energy consumption; Indium phosphide; Jitter; Signal design; Transmitters;
Conference_Titel :
Microwave Symposium Digest, 2004 IEEE MTT-S International
Print_ISBN :
0-7803-8331-1
DOI :
10.1109/MWSYM.2004.1335815
