DocumentCode
420087
Title
A DC-100 GHz frequency doubler in InP DHBT technology
Author
Puyal, V. ; Konczykowska, A. ; Nouet, P. ; Bernard, S. ; Blayac, S. ; Jorge, F. ; Riet, M. ; Godin, J.
Author_Institution
ALCATEL R & I/OPTO+, Marcoussis, France
Volume
1
fYear
2004
fDate
6-11 June 2004
Firstpage
167
Abstract
A broad-band monolithic integrated active frequency doubler operating in DC-100 GHz frequency range is presented. The circuit is fabricated in a self-aligned InP DHBT process. Circuit measurements show sinusoidal output waveform at 100 GHz with a rms time jitter of 400 fs. The doubler has a maximum conversion gain of +1 dB at 60 GHz. The fundamental suppression is better than 24 dB in the whole frequency range.
Keywords
III-V semiconductors; frequency multipliers; heterojunction bipolar transistors; indium compounds; integrated circuit design; monolithic integrated circuits; radiofrequency integrated circuits; 0 to 100 GHz; 1 dB; 400 fs; DHBT technology; Gilbert cell; InP; active splitter; circuit fabrication; circuit measurement; frequency doubler; frequency multiplier; frequency range; fundamental suppression; monolithic integrated doubler; rms time jitter; self-aligned DHBT process; sinusoidal output waveform; Circuits; DH-HEMTs; Fabrication; Frequency measurement; Gain; Heterojunctions; Indium gallium arsenide; Indium phosphide; Threshold voltage; Velocity measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Symposium Digest, 2004 IEEE MTT-S International
ISSN
0149-645X
Print_ISBN
0-7803-8331-1
Type
conf
DOI
10.1109/MWSYM.2004.1335834
Filename
1335834
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