• DocumentCode
    421353
  • Title

    Multi-objective mapping for mesh-based NoC architectures

  • Author

    Ascia, Giuseppe ; Catania, Vincenzo ; Palesi, Maurizio

  • Author_Institution
    Dipt. di Ingegneria Informatica e delle Telecomunicazioni, Catania Univ., Italy
  • fYear
    2004
  • fDate
    8-10 Sept. 2004
  • Firstpage
    182
  • Lastpage
    187
  • Abstract
    We present an approach to multi-objective exploration of the mapping space of a mesh-based network-on-chip architecture. Based on evolutionary computing techniques, the approach is an efficient and accurate way to obtain the Pareto mappings that optimize performance and power consumption. Integration of the approach in an exploration framework with a kernel based on an event-driven trace-based simulator makes it possible to take account of important dynamic effects that have a great impact on mapping. Validation on both synthesized traffic and real applications (an MPEG-2 encoder/decoder system) confirms the efficiency, accuracy and scalability of the approach.
  • Keywords
    Pareto optimisation; discrete event simulation; genetic algorithms; image coding; power consumption; system-on-chip; MPEG-2 decoder system; MPEG-2 encoder system; Pareto mappings; event-driven trace-based simulator; evolutionary computing; genetic algorithm; mapping space; mesh-based network-on-chip architecture; multiobjective exploration; multiobjective mapping; performance optimization; power consumption optimization; synthesized traffic; Computational modeling; Computer architecture; Decoding; Discrete event simulation; Energy consumption; Kernel; Network-on-a-chip; Pareto optimization; Scalability; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Hardware/Software Codesign and System Synthesis, 2004. CODES + ISSS 2004. International Conference on
  • Print_ISBN
    1-58113-937-3
  • Type

    conf

  • DOI
    10.1109/CODESS.2004.241215
  • Filename
    1360502