DocumentCode
421400
Title
A low power 13-Gb/s 27-1 pseudo random bit sequence generator IC in 120 nm bulk CMOS
Author
Wohlmuth, Hans-Dieter ; Kehrer, Daniel
Author_Institution
Corp. Res., Infineon Technol. AG, Munich, Germany
fYear
2004
fDate
7-11 Sept. 2004
Firstpage
233
Lastpage
236
Abstract
We present a pseudo random bit sequence (PRBS) generator with a sequence length of 27-1. The circuit uses a 7 bit full rate shift register with a linear XOR feedback and works up to data rates of 13 Gb/s. The PRBS generator features a divide by 2 trigger divider, two 3 bit shifted outputs and an autostart logic. The circuit draws 137 mA from a single 1.5 V supply. The circuit is manufactured in 120 nm bulk CMOS technology.
Keywords
CMOS integrated circuits; binary sequences; circuit feedback; frequency dividers; integrated circuit design; logic gates; low-power electronics; power consumption; random sequences; shift registers; trigger circuits; 1.5 V; 120 nm; 13 Kbyte/s; 137 mA; 3 bit shifted outputs; 7 bit full rate shift register; autostart logic; bulk CMOS technology; data rates; linear XOR feedback; low power electronics; pseudo random bit sequence generator IC; trigger divider; CMOS integrated circuits; CMOS logic circuits; CMOS technology; Circuit synthesis; Costs; Energy consumption; Frequency; Integrated circuit technology; Manufacturing; Power generation;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Circuits and Systems Design, 2004. SBCCI 2004. 17th Symposium on
Print_ISBN
1-58113-947-0
Type
conf
DOI
10.1109/SBCCI.2004.240921
Filename
1360575
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